Anti-Tamper IP

Anti-Tamper IP

Atessa’s anti-tamper (AT) IP solutions have programmable functions that meet evolving security mandates and threats to both defense and commercial applications. We offer our IP in kits and at the core is our Secure Bond Controller.

Secure Bond Controller

Serving as the security center point, our Secure Bond Controller seamlessly bonds security functionality to system components to detect tamper and protect system behavior. This small-space controller locks target design IP to any FPGA or custom ASIC device, allowing systems to be secure at rest, during boot, and during operation.

Security IP Kits

We provide solutions in Security IP Kits, complied with the set of countermeasures appropriate for your target device, system application, and protection needs. For example, we offer:

  • FPGA IP Kits
    • Xilinx® Family, including Ultrascale, Virtex-7, Virtex-6, Kintex-7, Artix-7
    • Microsemi® Family, including SmartFusion2
    • Altera® Family
  • ASIC IP Kits
    • ASIC Development IP
    • FCA IP
  • Processor IP Kits
    • IP for Intel® Processor-Based Architectures
    • Quad Secure Processor
    • Ultra Secure Processor (Advance Announcement)

New!  Durata™ is a new encoding feature available in Atessa IP that provides lifespan and location-based security for information transfer. 

We all know that once we send a file,
we no longer have absolute control over how it is seen or used.
So, what if we could?

Choose who sees your information, when they can see it,
where they can open it, and for how long the data is available.

Supporting advanced system security and the protection of critical information, Durata allows you to select the lifespan of the information to be transferred – from millionths of a second to thousands of years. In addition, AT protection embedded in Durata enables enforcement of location and protects against unauthorized access at the highest levels of strength.

In addition to Durata

Features

All of our kits include Trusted, soft core IP with hundreds of AT countermeasures that work together to protect Critical Program Information (CPI) and critical technology (CT) during all system states.

All IP kits from Atessa are:

  • Applicable to FPGA, ASIC or other logic-bearing devices
  • Compatible with existing security measures
  • Stealth, providing no outward indication of AT
  • Upgradeable, designed to enable rapid response to future threats and requirements
  • Scalable to meet the security needs of various programs and applications
  • Physically unclonable
  • Small in footprint and very low in power

Defense-Grade

For U.S. Government Department of Defense programs, our Security IP Kits can help you meet your anti-tamper mandates (DoD Directive 5200.39).

Easy Integration

Check out our software tool sets that can help you quickly implement your security IP.